Static Path Compression in Timed Systems

The paper presents a method of abstraction for timed systems. To extract an abstract model of a timed system we propose to use static analysis, namely a technique called path compression. The idea behind the path compression consists in identifying a path (or a set of paths) on which a process executes a sequence of transitions that do not influence a reachability property being verified, and replacing it with a single transition. The concrete model of an abstraction is proved to be in a stuttering bisimulation with the one of the original system. We present the technique for a timed system modeled in Intermediate Language of the verification tool VerICS. The reduction is made at the very beginning of the verification process and this makes it beneficial and effective in handling the state explosion problem.